Product Overview
  • Four 933 Mbit/s to 1.25 Gbits/s IEEE 802.3-2000 Gigabit Ethernet and Fibre Channel Physical Interfaces (FC-PI) System Compliant Transceivers.
  • Four secondary serial channels for redundant system design.
  • Configurable as four independent channels or as a single logical trunked channel with deskew providing 4 Gbits/duplex data throughput.
  • Integrated clock synthesis, clock recovery, serializer/deserializer, built-in self-test, 8B/10B codec and IEEE 802.3-2000 Gigabit Ethernet Physical Coding Sublayer (PCS) logic.
  • Rate matching via IDLE character insertion and deletion capable of compensating up to ±400 ppm of clock difference between channels.
  • Pin programmable or software configurable operation using 2-pin IEEE 802.3 MDC/MDIO serial management interface.
  • Supports pin-programmable hardwareonly device configuration.

Typical Applications include:

  • High-speed serial backplanes.
  • IEEE 802.3-2000 Gigabit Ethernet dense line cards.
  • ANSI X3T11 Fibre Channel dense line cards.
  • Link Aggregation.
  • Intra-system and inter-system interconnect.
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Product Brief
      Version Issue Date
  PDF Document QuadPHY 1G Standard Product Short Form Data Sheet [50 KB] PMC-2020026 6 2004-06-23
Data Sheet
      Version Issue Date
  PDF Document QuadPHY 1G Telecom Standard Product Data Sheet [959 KB] PMC-2012433 6 2005-11-28
Errata
      Version Issue Date
  PDF Document PM8354A QuadPHY 1G Revision D Device Errata [188 KB] PMC-2031643 1 2003-10-08
  PDF Document PM8354 QuadPHY 1G Revision B Device Errata [183 KB] PMC-2022049 3 2003-10-07
Application Note
      Version Issue Date
  PDF Document PMC SERDES Introduction Sheet [272 KB] PMC-2040749 1 2004-05-14
  PDF Document Octal/Quad/DualPHY 1G Board Level Design and Debug Tips [171 KB] PMC-2030175 3 2004-07-12
  PDF Document OCTAL/QUADPHY-1G DESIGN TRANSITION DOCUMENT [602 kB] PMC-2012058 4 2002-10-09
Locked PDF Document Knowledge Base Items for the PM8354 QuadPHY 1G [259 kB] PMC-2020402 2004-01-08
Models
      Version Issue Date
Locked PDF Document Input Output Buffer Information Specification (IBIS) Model for the PM8354 QUADPHY-1G Rev D [127 KB] PMC-2031925 1 2004-06-22
Locked Compressed Document INPUT OUTPUT BUFFER INFORMATION SPECIFICATION (IBIS) MODEL FOR THE PM8354 QUADPHY-1G [41 KB] PMC-2021074 3 2003-11-27
Symbols/Footprints
      Version Issue Date
Locked Compressed Document PM8354A-NI QuadPHY 1G Rev D 289 CABGA CAD Symbols and Footprints [173 KB] PMC-2051134 1 2005-06-20
Technical Overview
      Version Issue Date
  PDF Document ESD 10 Gigabit Ethernet Application Sheet [212 KB] PMC-2031953 1 2003-12-29
  PDF Document Digital Video Application Sheet [223 KB] PMC-2031955 1 2003-12-29
  PDF Document ESD Aerospace, Industrial and Military Imaging Application Sheet [239 KB] PMC-2031957 1 2003-12-29
  PDF Document ESD SERDES Quality Overview [319 KB] PMC-2031959 1 2003-12-29
  PDF Document ESD Wireless Application Sheet [313 KB] PMC-2031954 2 2004-08-23
  PDF Document ESD Gigabit Ethernet Application Sheet [248 KB] PMC-2031952 2 2003-12-29
  PDF Document ESD AdvancedTCA ( ATCA ) Application Sheet [310 KB] PMC-2040765 1 2004-09-16
  PDF Document ESD IP-Based DSLAMs and Access Concentrators Application Sheet [289 KB] PMC-2040993 1 2004-08-11
  PDF Document ESD SerDes Product Selector Guide [508 KB] PMC-2031951 2 2003-12-16
  PDF Document QuadPHY 1G Product Overview [256 kB] PMC-2021157 1 2002-07-05
BSDL Files
      Version Issue Date
  Compressed Document QuadPHY-1G Rev B BSDL File [5 kB] PMC-2031093 1 2002-12-02